| L1 |
介绍
Introduction (PDF)
课程目标,数字逻辑,硬件描述语言
Course Objectives, Digital Logic, Hardware Description Languages |
| L2 |
组合逻辑
Combinational Logic (PDF)
逻辑门,布尔代数,布尔代数的显形表示,风险
Logic Gates, Boolean Algebra, Visualizations of Boolean Algebra, Hazards |
| L3 |
介绍Verilog®(组合逻辑)
Introduction to Verilog® (Combinational Logic) (PDF)
逻辑综合, Verilog®硬件描述语言,用Verilog®语言描述的组合逻辑,测试板
Logic Synthesis, The Verilog® Hardware Description Language, Combinational Logic in Verilog®, Testbenches |
| L4 |
时序组块
Sequential Building Blocks (PDF)
用反馈,锁存,触发器保存状态,
时钟,时序限制,时钟脉冲相位差
Preserving State with Feedback, Latches and Flip-flops, Clocks and Timing Constraints, Clock Skew |
| L5 |
简单时序电路与Verilog®
Simple Sequential Circuits and Verilog® (PDF)
简单计数器, 时序电路的Verilog®实现
Simple Counters, Verilog® Implementation of Sequential Circuits |
| L6 |
有限状态机与Verilog®实现
Finite-State Machines and Verilog® Implementation (PDF)
亚稳态和同步,mealy 和 moore 形式, Verilog®实现,FSM实例
Metastability and Synchronization, Mealy and Moore Formalisms, Verilog® Implementations, FSM Examples |
| L7 |
存储器
Memories (PDF)
RAM和ROM的技术和类型,存储器控制电路,特殊存储器,高性能接口
Technologies, Types of RAM and ROM, Memory Controller Circuits, Specialty Memories, High-performance Interfaces |
| L8 |
算术电路
Circuits for Arithmetic (PDF)
二进制加减,全加器的实现和性能,高速加法,带符号加法
Binary Addition and Subtraction, Implementation and Performance of the Full Adder, High-speed Addition, Signed Arithmetic |
| L9 |
模拟组块
Analog Building Blocks (PDF)
模拟输入,高效Op-amp电路,A/D与D/A
转换,高效A/D与D/A电路
Analog Inputs, Useful Op-amp Circuits, A/D and D/A Conversion, Useful A/D and D/A Circuits |
| L10 |
系统集成问题和主/副FSM
System Integration Issues and Major/Minor FSM (PDF)
层次和模块,数据和控制通道, 主/副FSM, Altera的存储模块(RAM/ROM), 设计技巧
Hierarchy and Modularity, Data and Control Paths, Major and Minor FSMs, Memory Modules (RAM/ROM) in Altera, Design Tips |
| L11 |
可重复配置逻辑
Reconfigurable Logic (PDF - 2.0 MB)
商用器件概述,可编程逻辑(PAL),FPGA架构,
以及软件工具
Overview of Commercial Devices, Programmable Logic (PAL), FPGA Architectures, and Software Tools
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| L12 |
可重复配置逻辑(续)
Reconfigurable Logic (cont.) (PDF - 2.0 MB)
商业器件概述,可编程逻辑(PAL),FPGA 架构,
以及软件工具
Overview of Commercial Devices, Programmable Logic (PAL), FPGA Architectures, and Software Tools
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| L13 |
视频
Video (PDF)
显示,同步,信号恢复,同步时序
Displays, Synchronization, Recovery of Signals, Sync Timing
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| L14 |
专题开始
Project Kickoff (PDF)
以往6.111专题的视频,专题思路,截止日期和目标,专题指导原则,评分,异步接口和器件对器件通讯
Video of Past 6.111 Projects, Project Ideas, Deadlines and Goals, Project Guidelines, Grading, Asynchronous Interfaces and Kit-to-kit Communication |
| L15 |
数字集成电路和系统
Digital Integrated Circuits and Systems (PDF - 2.5 MB)
Moore定律,VLSI集成,布线和制造,
应用专用电路，微处理器，状态和运算传递，重计时，并行和流水线操作
Moore's Law, VLSI Integration, Layout and Fabrication, Application-specific Circuits, Microprocessors. Behavioral and Algorithmic Transformations, Retiming, Parallelism and Pipelinling |
| L16 |
功率耗散
Power Dissipation (PDF - 1.5 MB)
热量和电池寿命问题,能源消耗,针对能源的电路和运算优化,电压换算
Heat and Battery Life Issues, Sources of Power Dissipation, Circuit and Algorithm Optimizations for Power, Voltage Scaling |
| L17 |
电机与位置测定
Motor and Position Determination (PDF)
伺服,位置测量,编码,电机,绕组
Servos, Position Measurement, Encoders, Motors, Windings
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